1. Field of the Invention
The present invention relates to a drive circuit for a voltage driven type semiconductor device such as an IGBT (Insulated Gate Bipolar Transistors) or MOSFET, and in particular to a drive circuit having an overcurrent protection function that can protect the semiconductor device from an overcurrent fault caused by a short circuit or the like in a power conversion apparatus such as an inverter.
2. Discription of the Prior Art
FIGS. 1A and 1B are views illustrating the basic operation of a conventional overcurrent protection circuit of this type: FIG. 1A is a block diagram showing a gate drive system of a power conversion apparatus; and FIG. 1B is a diagram showing an equivalent circuit illustrating a voltage and current applied to a semiconductor device during a short circuit fault. Incidentally, the following description uses an IGBT as an example of a voltage driven type semiconductor device, and the same reference characters designate the same or corresponding parts throughout the drawings.
In FIGS. 1A and 1B, to the gate of an IGBT Q1 is applied a gate voltage V.sub.GE from a gate drive circuit 1 which turns on and off the IGBT Q1 in response to a drive signal V.sub.DR fed from a PWM control circuit 2.
Generally, the IGBT Q1 is a member constituting a three-phase bridge as shown in FIG. 4A. When a short circuit fault occurs at the load side of the bridge, for example, a voltage and current will be applied to the IGBT Q1 as shown in FIG. 1B: a short circuit current Ic flows from collector to emitter in the IGBT Q1 with a direct voltage Ed being applied thereto via a wire inductance L. The short circuit current Ic reaches four to five times the rated DC current of the IGBT Q1, or even about ten times the rated current in a high withstanding voltage device. Consequently, the instantaneous power applied to the IGBT Q1 during the short circuit period is extremely large, and hence, the IGBT must be turned off through the gate in a short time (less than about 10 .mu.sec) to cut off the overcurrent after the short circuit takes place. For this reason, an overcurrent protective function is incorporated in the gate drive circuit.
FIG. 2 is a circuit diagram showing an example of a conventional gate drive circuit with an overcurrent protection function. In this figure, reference character Q1 designates an IGBT as a main switching device, PH1 denotes a photocoupler for isolating the drive signal V.sub.DR applied from the control circuit (not shown in this figure), V1 denotes a voltage source for supplying an on-gate voltage, and V2 designates a voltage source for supplying an off-gate voltage.
The normal operation of the gate drive circuit of FIG. 2 will be described referring to FIG. 3A. When the photocoupler PH1 is turned on by the drive signal V.sub.DR (time t0 of FIG. 3A), a transistor T1 turns off, thereby turning a transistor T2 on and a transistor T3 off. Thus, the on-gate voltage V1 is applied across the gate and emitter of the IGBT Q1 through a gate resistor R.sub.G. At the same time, a transistor T11 turns off, by which a base current tries to flow in the transistor T4 through a resistor R11 and a Zener diode ZD1. The on-timing of the transistor T4, however, is delayed by a capacitor C1 connected to the collector of the transistor T11.
The on-voltage applied across the gate-emitter of the IGBT Q1 turns on the IGBT Q1, and so the collector-to-emitter voltage V.sub.CE of the IGBT Q1 drops to the on-voltage V.sub.CE (on). At the same time, the voltage at the positive terminal of the capacitor C1 (i.e., the voltage at the cathode of the Zener diode ZD1) is dropped to the on state voltage of the IGBT Q1 via a diode D1. In the ON condition of the IGBT Q1, the transistor T4 is maintained at the OFF state by selecting components to satisfy the following inequality. EQU V.sub.ZD1 +V.sub.BE.sbsb.(T4) &gt;V2+V.sub.CE.sbsb.(on) +V.sub.F.sbsb.(D1)( 1)
where
V.sub.ZD1 is the Zener voltage of the Zener diode ZD1; PA1 V.sub.BE (T4) is the V.sub.BE of the transistor T4; and PA1 V.sub.F (D1) is the forward voltage of the diode D1.
Subsequently, when the photocoupler PH1 is turned off by the elimination of the drive signal V.sub.DR, the transistor T1 turns on, which turns the transistor T2 off and the transistor T3 on. Thus the IGBT Q1 is turned off because of the off-gate voltage V2 applied across the gate and emitter of the IGBT Q1 through the gate resistor R.sub.G. At the same time, the transistor T11 is turned on, which discharges the capacitor C1 to prepare for the next turn-on operation of the IGBT Q1.
When a short circuit fault takes place during the ON period of the IGBT Q1 (time t1 of FIG. 3A), the following inequality is satisfied as the collector-to-emitter voltage of the IGBT Q1 increases. EQU V.sub.ZD1 +V.sub.BE.sbsb.(T4) &lt;V2+V.sub.CE.sbsb.(on) +V.sub.F.sbsb.(D1)( 2)
Thus, the transistor T4 conducts at time t2 (a delay time Td after the time t1, and hence the transistor T2 is turned off and the transistor T3 is turned on. This will apply the off-gate voltage V2 across the gate and emitter of the IGBT Q1, thereby turning off the IGBT Q1 to cut off the overcurrent. The delay time Td is provided to delay the on-timing of the transistor T4 until the IGBT Q1 has completed turning on, thereby preventing the overcurrent protective transistor T4 from being turned on during normal operation. Accordingly, the delay time Td will be called the "turn-on confirming time" hereinafter. In the course of this, the gate-to-emitter voltage V.sub.GE of the IGBT Q1 declines with time in accordance with the voltage on the capacitor C2, which is different from the normal turn-off operation as indicated by the solid line after time t2 in FIG. 3C. As a result, the reduction rate of the collector current Ic becomes small, thereby preventing a spike voltage V.sub.CEP in the voltage V.sub.CE during the current interruption. Incidentally, broken lines in FIG. 3C represent waveforms when an overcurrent is cut off by directly adding the off-gate voltage V2 to the gate of IGBT Q1.
The overcurrent protection in the gate drive circuit of FIG. 2, however, presents the following problems:
(1) The capacitor C1 (as a turn-on confirming timer) provides the turn-on confirming time Td to delay the on-timing of the transistor T4. As a result, the gate voltage V.sub.GE of the IGBT Q1 does not begin to decline until time t2 at which the transistor T4 conducts even if an overcurrent began to flow earlier at time t1 as shown in FIG. 3A. After time t2, the gate voltage declines, and interrupts the IGBT Q1 when it falls below the threshold voltage V.sub.GE (th) of the IGBT. In this case, the turn-on confirming time Td must be set relatively long in the conventional circuit. This will be described in more detail below.
FIG. 4A is a circuit diagram of a main circuit of the inverter; and FIG. 4B is a diagram illustrating waveforms of the turn-on operation of the IGBT. In FIG. 4A, reference character C0 denotes a smoothing capacitor constituting the direct current voltage source Ed, Q1 (Q11-Q16) designate IGBTs constituting a three-phase bridge inverter, and D0 (D01-D06) designate freewheeling diodes connected to the IGBTs Q11-Q16 in parallel fashion, respectively.
When the IGBT Q1 turns on, the collector-to-emitter voltage V.sub.CE of the IGBT suddenly decreases after the reverse recovery (after time t11 of FIG. 4A) of the freewheeling diode which is connected to the IGBT in an arm of the bridge inverter, and finally reaches a saturation voltage. The rate of decline of the voltage V.sub.CE in this case becomes smaller as the voltage decreases, and hence the turn-on time defined as a time from t11 to t12 is relatively large. Consequently, the turn-on confirming time Td must be set relatively long. As a result, in the conventional gate drive circuit, an unduly large collector current Ic flows in the IGBT during the overcurrent protection operation, and hence energy comsumption in the IGBT is large, thereby applying a great stress to the IGBT.
(2) There is another problem in the overcurrent protection operation during a short circuit fault in the IGBT inverter arranged as shown in FIG. 4A. FIGS. 3A and 3B illustrate this problem: FIG. 3A illustrates waveforms of the IGBT operation when the drive signal V.sub.DR fed from the PWM control circuit 2 to the gate drive circuit 1 has a broad pulsewidth; and FIG. 3B illustrates waveforms of the IGBT operation when the drive signal V.sub.DR has a narrow pulsewidth.
The problem is that a so-called soft interruption does not work in some occasions depending on the pulsewidth of the drive signal V.sub.DR and the timing of the short circuit fault. The term soft interruption means turning off the IGBT slowly so as to prevent a counterelectromotive force caused by the wire inductance L. The soft interruption is accomplished by slowly decreasing the gate voltage V.sub.GE.
The soft interruption works normally when the pulsewidth of the drive signal V.sub.DR is broad enough to continue beyond a term T.sub.W that begins at time t1 when a short circuit fault occurs and terminates at time t3 when the overcurrent is interrupted, thereby turning off the IGBT Q1 safely as shown in FIG. 3A.
In contrast to this, when the drive signal V.sub.DR terminates during the term T.sub.W as shown in FIG. 3B, the gate voltage V.sub.GE suddenly changes as in a normal turn-off operation, and the soft interruption does not function. As a result, a spike voltage V.sub.CEP takes place as shown in FIG. 3B. Thus, the soft interruption does not work (a) when the pulse width of the drive signal V.sub.DR is narrow or (b) when the drive signal V.sub.DR terminates just after a short circuit fault occurs. This hinders the IGBT Q1 from turning off safely.